| Project Title |
Source |
Category |
Posted On |
| Face Recognition using FPGA |
GAF |
Electronics, Matlab & Mathematica, Verilog / VHDL |
Tue, 22 May 2012 09:46:26 -0400 |
| Verilog - Digital video Camera + Zoom using DE2-70 board |
GAF |
Electrical Engineering, Electronics, Verilog / VHDL |
Tue, 08 May 2012 07:03:55 -0400 |
| solving some problems |
GAF |
C Programming, C# Programming, Electronics, Engineering, Verilog / VHDL |
Mon, 07 May 2012 16:39:22 -0400 |
| 32bit single precision floating point addition unit(verilog) |
GAF |
Software Architecture, Verilog / VHDL |
Sat, 05 May 2012 16:57:50 -0400 |
| OFDM and CDMA |
GAF |
Electrical Engineering, Telecommunications Engineering, Verilog / VHDL |
Tue, 01 May 2012 07:09:19 -0400 |
| VHDL and microcontroller questions needing solutions |
GAF |
Electrical Engineering, Electronics, Microcontroller, Telecommunications Engineering, Verilog / VHDL |
Mon, 30 Apr 2012 07:10:06 -0400 |
| A Simple State Machine including Test bench and memory block |
GAF |
Verilog / VHDL |
Tue, 24 Apr 2012 04:52:54 -0400 |
| Field Programmable Gate Array Implementation of Reed-Solomon |
GAF |
Marketing, Verilog / VHDL |
Tue, 24 Apr 2012 00:10:18 -0400 |
| POS system |
GAF |
Verilog / VHDL |
Mon, 23 Apr 2012 20:14:58 -0400 |
| Simple POS system |
GAF |
Verilog / VHDL |
Mon, 23 Apr 2012 19:11:53 -0400 |
| implemetation AES for real time image using verilog on FPGA |
GAF |
Marketing, Verilog / VHDL |
Mon, 23 Apr 2012 12:41:31 -0400 |
| A Simple State Machine including Test bench |
GAF |
Verilog / VHDL |
Sun, 22 Apr 2012 05:08:06 -0400 |
| SUGGEST A PROJECT! |
GAF |
Verilog / VHDL |
Sun, 22 Apr 2012 00:56:08 -0400 |
| Verilog Coding Very simple CPU (computer architecture) desig |
GAF |
Electrical Engineering, Electronics, Verilog / VHDL |
Sat, 21 Apr 2012 00:08:53 -0400 |
| DE1 board SRAM chip called IS61LV25616AL-10 interfacing |
GAF |
Verilog / VHDL |
Thu, 19 Apr 2012 17:05:11 -0400 |
| Image Capture and Vector Display |
GAF |
Electronics, Verilog / VHDL |
Thu, 12 Apr 2012 19:19:58 -0400 |
| maths verilog task ( electrical eng) |
GAF |
Algorithm, Electrical Engineering, Electronics, Mathematics, Verilog / VHDL |
Sat, 07 Apr 2012 11:37:22 -0400 |
| v_e_r-i_log task |
GAF |
Verilog / VHDL |
Fri, 06 Apr 2012 12:04:51 -0400 |
| SONET Framer |
GAF |
Verilog / VHDL |
Thu, 05 Apr 2012 12:59:15 -0400 |
| Xilinx system generator model optimization |
GAF |
Engineering, Matlab & Mathematica, Verilog / VHDL |
Thu, 05 Apr 2012 10:27:32 -0400 |
| PS2 Keyboard interface design with Xilinx FPGA VHDL spartan |
GAF |
Verilog / VHDL |
Sun, 01 Apr 2012 13:08:11 -0400 |
| FPGA board with USB 3.0 |
GAF |
C++ Programming, Electrical Engineering, Electronics, Microcontroller, Verilog / VHDL |
Fri, 30 Mar 2012 04:29:59 -0400 |
| huffman algorithm using HDL |
GAF |
Verilog / VHDL |
Wed, 28 Mar 2012 12:40:50 -0400 |
| VLSI DESIGN FOR PRODUCT |
GAF |
Electronics, Verilog / VHDL |
Mon, 26 Mar 2012 03:02:55 -0400 |
| vhdl assignment(computer architecture) |
GAF |
Electrical Engineering, Electronics, Engineering, Verilog / VHDL |
Fri, 23 Mar 2012 17:24:44 -0400 |
| DE0-nano interface with SHT15 sensor & 16*2 LCD |
GAF |
Electrical Engineering, Electronics, Microcontroller, Verilog / VHDL |
Tue, 20 Mar 2012 17:54:04 -0400 |
| DE0_NANO fpga accelerometer |
GAF |
Electrical Engineering, Verilog / VHDL |
Tue, 20 Mar 2012 17:48:19 -0400 |
| A synthesizable implementation of Compression engines |
GAF |
Electrical Engineering, Electronics, Engineering, Matlab & Mathematica, Verilog / VHDL |
Wed, 07 Mar 2012 02:39:40 -0500 |
| A synthesizable implementation of ECC engines |
GAF |
Electrical Engineering, Electronics, Engineering, Matlab & Mathematica, Verilog / VHDL |
Wed, 07 Mar 2012 02:35:44 -0500 |
| A synthesizable implementation of Search engines |
GAF |
Electrical Engineering, Electronics, Engineering, Matlab & Mathematica, Verilog / VHDL |
Wed, 07 Mar 2012 02:39:00 -0500 |
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